1. Field of the Invention
The present invention relates to nonvolatile memory devices and methods of manufacturing the same, and more particularly to nonvolatile memory devices that include a multilayered inter-gate dielectric layer structure and methods of manufacturing the same.
2. Description of the Prior Art
Memory devices are used in a wide variety of apparatuses, such as microcontrollers, credit cards, and the like. A memory device can be classified into a volatile memory device, such as a DRAM, an SRAM, and the like, in which data input/output access can be performed quickly, but data is lost with loss of power, and a nonvolatile memory device, such as a ROM, in which data input/output is performed relatively slowly, but data can be more permanently retained absent power.
Another type of nonvolatile memory device is the EEPROM which is typically used in a flash memory devices and the like. Such an EEPROM or flash memory device, for example, has a structure in which a tunneling layer, a floating gate, an inter-gate dielectric layer structure, and a control gate electrode are sequentially formed on a semiconductor substrate. The floating gate is designed so that a coupling voltage is applied from the control gate electrode to the floating gate to produce an electric potential difference between the floating gate and the semiconductor substrate, and electrons are injected from the semiconductor substrate to the floating gate. However, the voltage coupling effect being applied to the floating gate is influenced by capacitance between the control gate electrode and the floating gate. In order to enable electrons to be injected even at low voltages, it is desirable that the voltage coupling effect is large.